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Design Methods for Testability of Multilayer Boards

Time:2025-06-13 Views:1

  Design Methods for Testability of Multilayer Boards

  The design for testability (DFT) of multilayer boards is a crucial aspect of the printed circuit board (PCB) development process, aiming to ensure efficient and accurate testing during manufacturing and throughout the product lifecycle. With the increasing complexity of multilayer boards, incorporating proper DFT techniques becomes essential to detect faults, reduce production costs, and improve overall product quality.

  One fundamental DFT method is the inclusion of test points. Test points are strategically placed pads on the PCB that provide direct access to electrical nodes, allowing test equipment to measure voltages, currents, and signal integrity. In multilayer boards, test points should be distributed evenly across different layers and critical circuit paths. They should be large enough for probes to make reliable contact but small enough not to interfere with component placement or routing. Moreover, test points should be connected to the target nodes with short, low - impedance traces to minimize signal distortion during testing.

  Boundary scan technology, such as the Joint Test Action Group (JTAG) standard, is another important DFT approach for multilayer boards. JTAG enables in - system testing of integrated circuits (ICs) and the overall PCB. It uses a dedicated test access port (TAP) and a series of shift registers within the ICs to control and observe signals at the boundaries of the components. By incorporating JTAG - compliant ICs and designing the PCB to support the JTAG interface, manufacturers can perform thorough functional testing, detect stuck - at - faults, and verify the integrity of inter - component connections without the need for extensive physical probing.

  Partitioning the circuit into smaller, testable sub - systems is also a key DFT strategy. In a complex multilayer board, dividing the circuit into functional blocks allows for more focused testing. Each sub - system can be tested independently, making it easier to isolate and identify faults. This approach also simplifies the test fixture design, as different fixtures can be created for each sub - system. Additionally, using built - in self - test (BIST) circuits within components can enhance the testability of multilayer boards. BIST circuits, such as those found in some microcontrollers and memory chips, can perform internal diagnostic tests, reducing the reliance on external test equipment and speeding up the testing process.

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